Many types of circuits often need to delay digital signals in order to operate properly. For example, duty cycle correction circuits often delay one or more digital signals in order to produce a clock signal having a duty cycle of approximately fifty percent. This may be useful in various applications, such as in synchronous dynamic random access memories (SDRAMs) and delay locked loops (DLLs), where both rising and falling edges of a clock signal are used.
Conventional circuits that delay digital signals often suffer from various problems. For example, the accuracy of conventional duty cycle correction circuits is often proportional to the “lock time” needed to reach the appropriate duty cycle. Higher accuracy typically requires longer lock times, and shorter lock times typically require lower accuracy. Also, conventional circuits that delay digital signals often suffer from process, voltage, and temperature (PVT) variations. Because of this, the behaviour of the conventional circuits typically varies based on changes or variations in manufacturing processes, operating voltages, and operating temperatures.